这个与上述算术指令的差异在于限定了操作数的取值范围，当出现溢出，CPSR的Q会置位，但这个Q位在后续的计算中不会被清除，也就是说如果是一系列运算，Q置位只能说明其中之一发生了溢出，但具体是哪个不清楚。
OpcodeDescriptionQADD used in the same way as the ADD instruction, but does not update condition codes
QSUB executes a saturating subtraction
QDADD (Saturating Double Add) calculates SAT(Rm + SAT(Rn * 2)), Q according to Addition not Doubling
QDSUB (Saturating Double Subtraction) calculates Rm minus two times Rn. SAT(Rm – SAT(Rn * 2))
DATA TRANSFER
ARM使用的是Load/Store架构，数据必需从存储器搬到寄存器中才能使用。
OpcodeDescriptionLDR (Load) is an instruction used for moving a single data element from system memory into a register
STR (Store) from register to system memory
LOGICAL OpcodeDescription
AND 按位与
ORR 按位或
EOR (Exclusive-OR)按位异或
BIC is the equivalent of AND NOT; in C, it is equivalent to operand1 & (!operand2)
CLZ (Count Leading Zeros) is an instruction that takes the register Rm, counts the number of leading zeros, and places the result in Rm
COMPARE
Compare instructions are instructions that do not return any results, but set condition codes.
OpcodeDescriptionCMP compares two values, updating the CPSR. It is the equivalent to operand1 - operand2
CMN is the equivalent to operand1 + operand2
TST is the equivalent to operand1 & operand2
TEQ compares operand1 and operand2 using a bitwise exclusive OR
BRANCH OpcodeDescription
B (Branch)is a permanent branch; no return is possible
BL (Branch with Link) the address just after BL will be put into r14
BX (Branch and Exchange) is an instruction that enables the program to switch between ARM state and Thumb state
BLX (Branch with Link and Exchange) is like the BX instruction but also updates the Link register r14
MULTIPLY OpcodeDescription
MUL Rd = Rm * Rs
MLA Multiply two numbers together with accumulate.Rd = (Rm * Rs) + Rn
UMULL (Unsigned Multiply Long) RdHi,RdLo = Rm * Rs
UMLAL (Unsigned Multiply with Accumulate Long) RdHi, RdLo = RdHi, RdLo + ( Rm * Rs )
SMULL (Signed Multiply Long)
SMLAL (Signed Multiply with Accumulate Long)
DIVIDE OpcodeDescription
SDIV (Signed Divide) SDIV r0, r1, r2 ; r0 = r1/r2
UDIV Unsigned divide
MULTIPLE REGISTER DATA TRANSFER OpcodeDescription
STM is the “store multiple” instruction
LDM is the “load multiple” instruction
BARREL SHIFTER OpcodeDescription
LSL (Logical Shift Left) shifts the value left by the specified amount, padding with zeros
LSR (Logical Shift Right) is just like LSL
ASR (Arithmetic Shift Right) is just like LSR,the difference with LSR is that ASR keeps the signed bit
ROR (Rotate Right) rotates a number. Bits moved out of the right end of the register are rotated back into the left end
RRX (Rotate Right Extended) is just like ROR but without the Carry flag
STACK OPERATIONS
堆栈是内存最末端的一块区域，它的底也就是内存的最末端。堆栈主要存放函数调用需要传递数据。
PUSH and POP
MRC (Move to ARM Registers from Coprocessor)
MCR (Move to Coprocessor from ARM Registers)
MISCELLANEOUS INSTRUCTIONS OpcodeDescription
SVC (Supervisor Call) causes an exception and switch to Supervisor mode
NOP is short for No Operation
MRS (Move to ARM Register from System coprocessor)
MSR (Move to System coprocessor register from ARM Register)
References