RISC-V CPU加电执行流程 (6)

RISC-V CPU加电执行流程

Reference:

[1] SiFive FU540-C000 Manual, https://sifive.cdn.prismic.io/sifive/b5e7a29c-d3c2-44ea-85fb-acc1df282e21_FU540-C000-v1p3.pdf

[2] An Introduction to RISC-V Bootflow, https://crvf2019.github.io/pdf/43.pdf

[3] The Standardized Boot flow for RISC-V Platforms,

[4] RISC-V64 opensbi启动过程, https://cloud.tencent.com/developer/article/1758282

[5] uboot作用和功能, https://blog.csdn.net/yilongdashi/article/details/87968572

[6] uboot启动流程概述_关于riscv启动部分思考, https://blog.csdn.net/weixin_39530149/article/details/112312779

[7] DLL/PLL on a DRAM, https://www.rambus.com/dllpll-on-a-dram/

[8] 内存为什么要Training? 内存初始化代码为什么是BIOS中的另类?, https://zhuanlan.zhihu.com/p/107898009

[9] 设备树的基本概念,https://zhuanlan.zhihu.com/p/69188823

[10] opensbi下的riscv64裸机系列编程,

[11] Rambus DDR3 PHY IP, https://www.rambus.com/interface-ip/ddrn-phys/ddr3-phy/

[12] ARMv8虚拟化,https://www.cnblogs.com/LoyenWang/p/13584020.html

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